Frequency synthesizer is the hardcore of a electronic system.

频率合成器是电子系统的核心部件.

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A fully differential charge pump for a frequency synthesizer is proposed.

提出了一种应用于频率综合器的全差分电荷泵电路.

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The highest frequency synthesizer JiHe 26.5 can reach.

这种合成器的最高频率可达26.5吉赫.

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PLL frequency synthesizer with DDS reference will adapt to local oscillator of modern radio.

采用DDS输出作为参考的PLL频率合成器非常适合用做现代电台的本振.

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Impulse test. This procedure for the AD 9850 ( DDS ) Direct Digital Frequency Synthesizer C language source code.

脉冲发生测试. 此程序为AD9850 ( DDS ) 直接数字频率合成器C语言源码.

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The key building blocks in the frequency synthesizer are - controlled oscillator ( VCO ) and high frequency divider circuit.

压 控振荡器 与除频器是频率合成器电路中,主要的电路之一.

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In this paper, a fractional - N frequency synthesizer based on high - order single - bit Σ? ? modulator is introduced.

本文介绍了高阶 单比特 Σ△调制器在小数分频频率综合器中的应用.

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A new coarse tuning loop for a wide - band dual - loop frequency synthesizer is presented.

提出了一种用于宽带、双 环路频率 综合器的粗调环路结构.

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Meanwhile , a fractional - N frequency synthesizer is designed and implemented for WCDMA in 0.18 um RFCMOS process.

接着又介绍了一种基于0.18umRFCMOS工艺的 、 用于WCDMA的分数N频率综合器的设计与实现.

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In this paper, a solution to fractional frequency dividing frequency synthesizer is introduced.

文中介绍了一种小数分频频率合成器的设计方案.

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PLL frequency synthesizer based on fractional frequency division and ∑ - ? ? technique is introduced.

本文介绍了采用 ∑- △调制技术的小数分频PLL频率合成器.

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A Quadrature Direct Digital Frequency Synthesizer ( QDDS ) based on CORDIC algorithm is presented.

设计了一种基于CORDIC算法的正交输出直接数学频率合成器 ( QDDS ),并在ALTERAFLEX10K系列 FPGA上 予以实现.

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