An 8 bits SCM was designed with VHSIC hardware description language ( VHDL ).
课题采用硬件 描述语言 VHDL设计了8位单片机系统.
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Direct Digital Frequency Synthesis ( DDS ) technology is realized on complex programmable logical component ( CPLD ) with hardware description language.
在复杂可编程逻辑器件 ( CPLD ) 上,用硬件语言实现了直接数字频率合成 ( DDS ) 技术.
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